Meta and Marvell Technology design new chip hardware together
FBNIC looks to boost internal networking capabilities at Meta
The chip will likely never go on commercial sale though
A collaboration between Meta and Marvell Technology has resulted in the development of a powerful new network chip.
The chip, called FBNIC, was designed with the aim of enhancing Meta’s internal networking capabilities, reducing downtime and increasing overall efficiency.
Announced at the 2024 OCP Global Summit, FBNIC claims to offer significant performance improvements – but it won’t be available for commercial sale anytime soon.
A custom approach to networking
The partnership created a custom Network Interface Controller (NIC) developed using a 5nm process, combining custom firmware, software, and hardware to deliver optimized network performance aimed at helping Meta streamline its networking operations.
The FBNIC chip supports a wide range of Ethernet network interfaces, ensuring Meta’s infrastructure can handle large amounts of data with high-speed connections, making it ideal for the massive scale of the company’s operations – especially when factoring in AI.
It also comes with a multi-host PCIe interface, which supports four independent Gen5 x4 ports allowing the chip to communicate efficiently across multiple servers. Furthermore, the custom firmware control provides access to all hardware internals, giving Meta the ability to tailor the chip’s performance to its specific needs.
In addition to developing FBNIC for its use, Meta has chosen to contribute the board design to the Open Compute Project (OCP), an initiative aimed at promoting open-source hardware designs for data centers.
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“The future of large-scale, data center computing will increasingly revolve around optimizing semiconductors and other components for specific applications and cloud infrastructure architectures,” said Raghib Hussain, President of Products and Technologies at Marvell.
“It’s been exciting to partner with Meta on developing their custom FBNIC on our industry-leading 5nm accelerated infrastructure silicon platform. We look forward to the OCP community leveraging the board design for future innovations.”
Via HPCwire
Original Author: Efosa Udinmwen | Source: TechRadar
